1. Field of the Invention
The invention relates to a piezo resistance type semiconductor device formed by arranging a piezo resistor onto a semiconductor substrate and, more particularly, to a piezo resistance type semiconductor device in which detecting sensitivity is improved without increasing an area of a forming region of a diaphragm on a semiconductor substrate.
2. Related Background Art
In recent years, sensors to detect various physical amounts have been manufactured by applying a semiconductor device manufacturing technique. Semiconductor devices such as pressure sensor, acceleration sensor, and the like have also been manufactured as piezo resistance type semiconductor devices on the basis of the semiconductor device manufacturing technique. The piezo resistance type semiconductor devices are widely used in the fields of automobiles, household appliances, industrial apparatuses, measuring instruments, medical equipment, and the like.
FIG. 11A is a plan view showing a principle of such a kind of piezo resistance type semiconductor device. FIG. 11B is a cross sectional view taken along the alternate long and two short dashes line 11B—11B in FIG. 11A. In the piezo resistance type semiconductor device, a semiconductor substrate made of, for example, silicon is used, a hollow portion 2 is formed in a partial region of the semiconductor substrate from the back surface side thereof, and a diaphragm 3 is formed so that a thickness of semiconductor substrate in this region becomes thin. The diaphragm 3 is also called a membrane. In FIG. 11A, the region of the diaphragm 3 is shown as a hatched region drawn by unidirectional oblique lines. In the semiconductor substrate, a region which is located around the hollow portion 2 and thicker than the diaphragm 3 functions as a supporting frame 1 for the diaphragm 3. The diaphragm 3 is generally formed as a region having a flat square or rectangular shape or as a circular region. The diaphragm 3 is a region showing micro deformation along with an external force difference when a pressure difference occurs between one surface and the other surface of the semiconductor substrate or when acceleration is applied in the direction perpendicular to the diaphragm. In positions where on the surface of the semiconductor substrate including the diaphragm 3, a stress accompanied by the deformation occurs, diffusion resistors (piezo resistors) whose resistance values change in accordance with the stress are formed. The diffusion resistors are formed by, for example, a step of injecting ions of impurities into the semiconductor substrate and a subsequent diffusion step and construct piezo resistance type stress detectors 4. The stress detector 4 made by the piezo resistor is formed in an elongated shape and wiring patterns (not shown) are connected to both ends in the longitudinal direction of the stress detector 4. Thus, the resistance value can be measured. The shape of the piezo resistor is not limited to be rectilinear but can be formed in a U-character shape to thereby enable the resistance across the piezo resistor to be measured.
According to such a sensor, by detecting a resistance change in the stress detector 4, the external force difference between both sides of the diaphragm 3 can be detected. The upper surfaces of the diaphragm 3 and the supporting frame 1 including the stress detectors 4, that is, the whole surface of the surface side of the semiconductor substrate is covered with a protection film 5.
To improve detecting sensitivity, generally, the diffusion resistors are provided along the two opposite sides of the almost rectangular diaphragm 3, respectively, or the diffusion resistor is provided along each side of the almost rectangular diaphragm 3 and those diffusion resistors are electrically bridge-connected. Referring to the diagrams, the longitudinal directions of the stress detectors 4 provided along the pair of two opposite sides of the diaphragm 3 are parallel to the extending direction of the corresponding side. The longitudinal directions of the stress detectors 4 arranged near another pair of two opposite sides cross perpendicularly to the extending direction of the corresponding side. The stress detectors 4 can be enclosed in the diaphragm 3 or, as shown in FIGS. 11A and 11B, they can be also arranged over the diaphragm 3 and the supporting frame 1. There can be a case where all of the stress detectors 4 are located outside of the diaphragm in accordance with the stress. Since stress sensitivity characteristics in the stress detector 4 changes in dependence on the direction of a current flowing in the piezo resistor and the applying direction of the stress, by Wheastone-bridge connecting the two pairs of stress detectors 4 arranged in the diaphragm 3 as mentioned above, the external force can be accurately measured with the high sensitivity.
Although the piezo resistance type semiconductor device has such a problem that it is easily influenced by a temperature, by providing a simple temperature compensating circuit, such a problem can be easily solved. There are also advantages in which the device can be relatively easily manufactured by using the ordinary semiconductor device manufacturing process, and the high sensitivity, miniaturization, and low costs can be easily accomplished by applying the present semiconductor fine patterning technique.
FIGS. 12A to 12D are cross sectional views sequentially showing manufacturing steps of the conventional piezo resistance type semiconductor device. First, as shown in FIG. 12A, the surface of a silicon semiconductor substrate 41 is coated with a photoresist 43. The photoresist 43 is patterned in accordance with the forming positions of the stress detectors 4. Subsequently, as shown in FIG. 12B, diffusion layers 42 are formed in an opening portion of the photoresist 43 by an ion injecting method or the like. The diffusion layer 42 is a layer which becomes the stress detector 4 comprising the piezo resistor (diffusion resistor). After that, as shown in FIG. 12C, the photoresist 43 is removed and, subsequently, a thermal treatment is executed, an interlayer insulation film, metal wirings, and a passivation film (passivation film) (they are not shown) are formed, and patterning is executed. Finally, as shown in FIG. 12D, by executing the patterning and etching from the back surface side of the silicon semiconductor substrate 41, the hollow portion 2 is formed so that the diaphragm 3 is formed. Thus, the piezo resistance type semiconductor device is obtained.
When the diaphragm is formed, the silicon semiconductor substrate is etched. As a method of etching silicon, wet etching using KOH (potassium hydroxide) or TMAH (tetramethyl ammonium hydride), dry etching using a fluorine/chlorine system gas, or the like has been put into practical use. At this time, an etching stopper layer is generally provided to uniform the thickness of diaphragm. A substrate in which the etching stopper layer has previously been formed is used. As a specific example, a silicon substrate in which a p-type diffusion layer of high concentration is buried or what is called an SOI (Silicon On Insulator) substrate in which a monocrystalline silicon layer is formed on an insulation layer (usually, silicon oxide film) is used.
As a technique for improving the detecting sensitivity of the piezo resistance type semiconductor device, a structure in which a V-shaped groove is formed on the diaphragm and stresses are concentrated on the piezo resistance type stress detector has been disclosed in Japanese Patent Application Laid-Open No. H08-247874 as a Japanese Patent Laid-Open Publication. FIG. 13A is a plan view showing the semiconductor device disclosed in the above Official Gazette. FIG. 13B is a cross sectional view of the semiconductor device shown in FIG. 13A. FIG. 13C is a cross sectional view of the semiconductor device in the state where an external force has been applied. The four stress detectors 4 are provided for the diaphragm 3 and a plurality of parallel grooves 6 are formed on the surface of the diaphragm 3 so that the stresses are concentrated on the stress detector 4.
Structures disclosed in Japanese Patent Application Laid-Open No. 2002-71492 as a Japanese Patent Laid-Open Publication are shown in FIGS. 14A to 14D. In the diaphragm, a thick film region 8 having a relatively large film thickness and a thin film region 7 having a relatively small film thickness are provided and the piezo resistance type stress detectors 4 are arranged in the thick film-region 8. Thus, the structure in which the stresses are concentrated on the piezo resistance type stress detector 4 is disclosed. Although the thickness of semiconductor substrate in the thick film region 8 is larger than that in the thin film region 7, it is smaller enough than the thickness of semiconductor substrate in the portion of the supporting frame around the diaphragm. According to the semiconductor device, on the diaphragm, the silicon layer in the portion away from the stress detector 4 is thinner than the silicon layer just under the stress detector 4 and the silicon layer near the periphery thereof. By using such a structure, the following effects can be expected. That is, (1) when the external force is applied to the diaphragm 3, the stresses are liable to be concentrated on the stress detector 4. Therefore, a micro external force and its change can be detected. (2) Since the stress detectors 4 are electrically insulated, there is no influence of a dark current due to a junction leakage or the like in a position near the substrate surface and the sensitivity can be improved.
FIGS. 14A to 14D correspond to examples of structures in which the thick film region 8 is set to different shapes and only the diaphragm portions are shown. A hatched portion shows the thick film region 8. A non-hatched (blank) portion shows the thin film region 7. In FIG. 14A, the thick film region 8 is formed in the center portion of the diaphragm so as to have an almost square shape. Further, the center portion of each side of the thick film region 8 and the center portion of each side of the external periphery of the diaphragm are connected in the thick film region 8, respectively. In FIG. 14B, the thick film region 8 is formed in a crucial shape so as to connect the center portions of the opposite sides of the external periphery of the diaphragm. In FIG. 14C, the thick film region 8 is formed in a line-shape so as to connect the center portions of one pair of opposite sides of the external periphery of the diaphragm. In FIG. 14D, the thick film regions 8 are formed toward the center of the diaphragm from the center portions of one pair of opposite sides of the external periphery of the diaphragm, respectively.
In a standard piezo resistance type semiconductor device 10 shown in FIGS. 11A and 11B, it has been known that when a length of one side of the diaphragm 3 is assumed to be (h) and a thickness of diaphragm 3 is assumed to be (a), the maximum stress occurring in the diaphragm 3 is proportional to (h/a)2. It will be understood from the above principle that in order to increase the maximum stress and improve the detecting sensitivity, it is preferable to increase the length (h) of one side of the diaphragm or decrease the thickness (a). It is unpreferable to increase the length (h) of one side in order to miniaturize the semiconductor device. Therefore, in order to improve the detecting sensitivity of the semiconductor device without increasing a size of forming region of the diaphragm 3, it is demanded to decrease the thickness (a) of diaphragm 3. However, if the thickness (a) of diaphragm 3 is decreased, a mechanical strength of the diaphragm 3 decreases.
Also in the semiconductor device disclosed in the above Official Gazette, similarly, if an occupation ratio of the thin film region and grooves of the diaphragm is increased in order to promote the stress concentration, the strength of the diaphragm itself decreases. There is a fear that when the excessive external force is applied, the diaphragm is broken in this portion. According to those structures, the piezo resistance type stress detectors are mutually electrically separated by the PN junction, and the piezo resistance type stress detectors, the diaphragm, and the thick film region 8 of the diaphragm are also electrically separated by the PN junction. The piezo resistance type stress detector has a high resistance and the occurrence of a small PN junction leakage causes a fear of deterioration in stress detecting precision. If it is intended to completely perform the device separation or the like, in order to device-separate the stress detectors, a mask patterning step have to be newly added to the steps before and after the step of forming each device unit including the stress detectors. This results in an increase in manufacturing costs of the semiconductor devices.
It is, therefore, an object of the invention to provide a piezo resistance type semiconductor device which can improve detecting sensitivity without increasing a size of forming region of a diaphragm and in which an influence of a leakage current is eliminated and output linearity is improved.